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Avicena Post-Deadline Paper at OFC 2021

June 8, 2021/0 Comments/in Events /by LIMITL355_5KY

OFC 2021 Post-Deadline Paper, Friday, 11 June 08:00 – 10:00 PDT Wide and parallel LED-based optical links using multi-core fiber for chip-to-chip communications B. Pezeshki et al.

Press Release

June 8, 2021/in News, Press Releases /by LIMITL355_5KY

Avicena unveils LightBundleTM, a chip interconnect technology with dramatically lower power consumption and higher bandwidth density Highly parallel optical links with power efficiency of 0.1pJ/bit, bandwidth density of 10Tbps/mm2 and reach of up to 10m promise to smash current interconnect bottlenecks in distributed compute systems MOUNTAIN VIEW, CA — June 8, 2021 — Avicena Inc., […]

Avicena Post-Deadline Paper at OFC 2021

June 8, 2021/0 Comments/in Events /by LIMITL355_5KY

OFC 2021 Post-Deadline Paper, Friday, 11 June 08:00 – 10:00 PDT Wide and parallel LED-based optical links using multi-core fiber for chip-to-chip communications B. Pezeshki et al.

Press Release

June 8, 2021/in News, Press Releases /by LIMITL355_5KY

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Avicena Post-Deadline Paper at OFC 2021

June 8, 2021/0 Comments/in Events /by LIMITL355_5KY

OFC 2021 Post-Deadline Paper, Friday, 11 June 08:00 – 10:00 PDT

Wide and parallel LED-based optical links using multi-core fiber for chip-to-chip communications

B. Pezeshki et al.

Read the Paper (requires OFC registration)

Press Release

June 8, 2021/in News, Press Releases /by LIMITL355_5KY

Avicena unveils LightBundle^TM, a chip interconnect technology with dramatically lower power consumption and higher bandwidth density

Highly parallel optical links with power efficiency of 0.1pJ/bit, bandwidth density of 10Tbps/mm² and reach of up to 10m promise to smash current interconnect bottlenecks in distributed compute systems

MOUNTAIN VIEW, CA — June 8, 2021 —

Avicena Inc., a privately held company in Mountain View, CA, today unveils LightBundle^TM, a highly parallel optical interconnect technology targeting up to 10 meters reach for chip-to-chip interconnects in distributed computing, processor-to-memory disaggregation, and other advanced computing applications. LightBundle^TM is based on arrays of novel GaN high-speed micro-emitters, leveraging the microLED display manufacturing ecosystem, and is fully compatible with high performance silicon ICs.

Interconnects are becoming the key bottleneck in compute and network systems. Highly variable workloads are driving the evolution of densely interconnected, heterogeneous, software-defined clusters of CPUs, Graphical Processing Units (GPUs), Data Processing Units (DPUs) and shared memory blocks. Exploding Artificial Intelligence (AI) and Machine Learning (ML) workloads are exemplary of emerging applications driving an accelerating need for interconnects with extremely high density, low power consumption and low latency.

We have developed very high-performance optical transmitters based on emitter technology from the display industry. These innovative devices would have been impractical just a few years ago. Our optimized devices and materials support 10Gbps links per lane over -40°C to +150°C temperature with excellent reliability. — Bardia Pezeshki, Founder & C.E.O.

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Avicena Post-Deadline Paper at OFC 2021

Press Release

Avicena Post-Deadline Paper at OFC 2021

Press Release

Full Sized Blog Element (Big Preview Pic)

Avicena Post-Deadline Paper at OFC 2021

Press Release

Avicena unveils LightBundle^TM, a chip interconnect technology with dramatically lower power consumption and higher bandwidth density

Highly parallel optical links with power efficiency of 0.1pJ/bit, bandwidth density of 10Tbps/mm² and reach of up to 10m promise to smash current interconnect bottlenecks in distributed compute systems

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